For exchanging digital data between electronic data processing units, it is known to use bus systems. Bus systems connect one or more “central” processing units with, typically, a plurality of peripheral components or auxiliary units. The bus comprises the address bus with the address lines through which the units at the bus with which data are to be exchanged can be selected, as well as the data bus with the data lines which convey the binary data to be exchanged. Moreover, control lines of a control bus are usually provided, via which writing and reading of the data is coordinated. In most cases, the processing unit is constituted by a central processor (CPU) on one side of the bus system, while memories, input/output components or similar units are situated on the other side of the bus. Such units will hereinafter be uniformly denoted as “memory units”, which memory units may comprise a plurality of individual “memory cells” for one data each.
In the known bus systems, there is a one-to-one relation between the memory cells that are addressable via the bus and the logic addresses via which these memory cells can be selected. For a write/read access to a given memory cell, the processing unit must therefore exactly apply the unambiguous logic address associated with the memory cell to the address bus, whereupon the connection with the desired memory cell is established and the data can be exchanged via the data bus. Thus, only one accurately defined address in the address location of the processing unit is obtained, by which the memory cell can be addressed. The data are transmitted in an unchanged form during the data exchange between the memory cell and the processing unit, i.e. they are transmitted in a “clear text” via the data bus.
The known method of exchanging data via a bus system has the drawback that it provides a weak point for unauthorized tapping of secret data. The reason is that the data to be transmitted are present as 1:1 copies on the data bus because each data is either directly controlled on the bus by the processing unit or processed in its present form by this unit. In the case of sensitive data such as, for example, a secret key for cryptographic functions, the problem arises that the secret data must be kept within comparatively large circuit portions. Moreover, algorithms often provide the sequence in which the data are to be written to individual addresses. This sequence must then be exactly maintained by the processing unit. Said characteristic features allow investigation of the confidential data by monitoring the bus system, the internal registers of the processing unit (CPU) or by other methods.